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? semiconductor components industries, llc, 2012 april, 2012 ? rev. 0 1 publication order number: ncv47711/d ncv47711 5 v to 20 v adjustable ldo with adjustable current limit and 3.3 v logic compatible enable input the ncv47711 is a 350 ma output current integrated low dropout regulator designed for use in harsh automotive environments. it includes wide operating temperature and input voltage ranges. the device is offered with adjustable voltage versions available in 3% output voltage accuracy. it has a high peak input voltage tolerance and reverse input voltage protection. it also provides overcurrent protection, overtemperature protection and enable for control of the state of the output voltage. the integrated current sense feature provides diagnosis and system protection functionality. the current limit of the device is adjustable by resistor connected to cso pin. voltage on cso pin is proportional to output current. features ? adjustable voltage version (from 5 v to 20 v) 3% output voltage ? enable input (3.3 v logic compatible thresholds) ? adjustable current limit (from 10 ma to 350 ma) with 10% accuracy ? protection features: ? current limitation ? thermal shutdown ? reverse input voltage ? this is a pb ? free device typical applications ? audio and infotainment system ? instrument cluster ? navigation ? satellite radio v out gnd v in cso en adj c in c out r 1 r 2 r cso c cso 1 f 22 f 1 f c b * ncv47711 figure 1. application schematic *required if usage of low esr output capacitor c out is demand, see regulator stability considerations section. http://onsemi.com marking diagram ordering information see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. v in cso 18 nc en nc gnd v out adj pin connections soic ? 8 exposed pad pd suffix case 751ac soic ? 8 ep 1 8 a = assembly location l = wafer lot y = year w = work week = pb ? free package 1 8 47711 alyw
ncv47711 http://onsemi.com 2 figure 2. simplified block diagram + - enable voltage reference thermal shutdown saturation protection v in en adj cso gnd v out v ref2 v ref1 tsd sp tsd sp v ref2 2.55 v v ref1 1.275 v i cso = i out / 100 + - pass device and current mirror pin function description pin no. pin name description 1 adj adjustable voltage setting input. see application section for more details. 2 gnd power supply ground. 3 en enable input; low level disables the ic. 4 cso current sense output, current limit setting and output current value information. see application section for more details. 5 v in positive power supply input. 6 nc not connected 7 nc not connected 8 v out regulated output voltage. epad epad connect to ground potential or leave unconnected.
ncv47711 http://onsemi.com 3 absolute maximum ratings (note 1) rating symbol min max unit input voltage v in ? 42 45 v enable input voltage v en ? 0.3 7.0 v adjustable input voltage v adj ? 0.3 10 v cso voltage v cso ? 0.3 7.0 v output voltage v out ? 1 40 v junction temperature t j ? 40 150 c storage temperature t stg ? 55 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristis and application information for safe operating area. esd capability (note 2) rating symbol min max unit esd capability, human body model esd hbm ? 2 2 kv esd capability, machine model esd mm ? 200 200 v 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (js ? 001 ? 2010) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) lead soldering temperature and msl (note 3) rating symbol min max unit moisture sensitivity level msl 2 ? lead temperature soldering reflow (smd styles only), pb ? free versions t sld ? 265 peak c 3. for more information, please refer to our soldering and mounting techniques reference manual, solderrm/d thermal characteristics (note 4) rating symbol value unit thermal characteristics (single layer pcb) thermal resistance, junction ? to ? air (note 5) thermal reference, junction ? to ? lead (note 5) r ja r jl 70 19 c/w thermal characteristics (4 layers pcb) thermal resistance, junction ? to ? air (note 5) thermal reference, junction ? to ? lead (note 5) r ja r jl 29 12 c/w 4. refer to electrical characteristis and application information for safe operating area. 5. values based on copper area of 645 mm 2 (or 1 in 2 ) of 1 oz copper thickness and fr4 pcb substrate. single layer ? according to jedec51.3, 4 layers ? according to jedec51.7. recommended operating ranges (note 6) rating symbol min max unit input voltage (note 7) v in 5.5 40 v output current limit (note 8) i lim 10 350 ma junction temperature t j ? 40 150 c 6. refer to electrical characteristis and application information for safe operating area. 7. minimum v in = 5.5 v or (v out_nom + 0.5 v), whichever is higher. 8. corresponding r cso is in range from 25 k down to 728 .
ncv47711 http://onsemi.com 4 electrical characteristics v in = 13.5 v, v en = 3.3 v, r cso = 0 , c cso = 1 f, c in = 1 f, c out = 22 f, esr = 1.5 , min and max values are valid for temperature range ? 40 c t j 150 c unless otherwise noted and are guaranteed by test design or statistical correlation. typical values are referenced to t j = 25 c. parameter test conditions symbol min typ max unit regulator output output voltage (accuracy %) v in = (v out_nom + 1 v) to 40 v, i out = 5 ma to 350 ma v out ? 3 ? 3 % line regulation v in = (v out_nom + 1 v) to (v out_nom + 20v), i out = 5 ma reg line ? 0.1 1.0 % load regulation i out = 5 ma to 350 ma reg load ? 0.14 1.4 % dropout voltage (note 9) i out = 150 ma, v do = v in ? v out v do ? 250 500 mv disable and quiescent currents disable current v en = 0 v v en = 0 v, t j = 25 c i dis ? ? ? 85 10 ? a na quiescent current, i q = i in ? i out i out = 1 ma, v in = (v out_nom + 8.5 v) i q ? 150 230 a quiescent current, i q = i in ? i out i out = 350 ma, v in = (v out_nom + 8.5 v) i q ? 23 50 ma current limit protection current limit v out = 0.9 x v out_nom , v in = (v out_nom + 8.5 v) i lim 400 ? ? ma psrr & noise power supply ripple rejection f = 100 hz, 0.5 v p ? p , i out = 5 ma, c in = none psrr ? 70 ? db output noise voltage f = 10 hz to 100 khz, c b = 10 nf, i out = 5 ma v n ? 100 ? v rms enable enable input threshold voltage logic low (off) logic high (on) v out 0.1 v v out 0.9 x v out_nom v th(en) 0.99 ? 1.85 1.9 ? 2.31 v enable input current v en = 3.3 v i en 2.0 9.0 20 a turn on time from enable on to 90% of v out_nom i out = 100 ma, c b = 10 nf, r 1 = 82 k , r 2 = 27 k t on ? 1.6 ? ms output current sense cso voltage level at current limit v out = 0.9 x v out_nom , (v out_nom = 5 v) r cso = 1 k v cso_ilim 2.346 ( ? 8 %) 2.55 2.754 (+8 %) v cso transient voltage level c cso = 4.7 f, r cso = 1 k , i out pulse from 10 ma to 350 ma, t r = 1 s v cso ? ? 3.0 v cso current to output current ratio (note 10) v cso = 2 v, i out = 10 ma to 350 ma, (v out_nom = 5v) i cso /i out ? ( ? 10%) (1/100) ? (+10%) ? cso current at no load current v cso = 0 v, i out = 0 ma, (v out_nom = 5 v) i cso_off ? ? 10 a cso capacitor c cso 1.0 ? 4.7 f thermal shutdown thermal shutdown temperature i out = 5 ma t sd 150 ? 195 c 9. measured when the output voltage v out has dropped ? 2% from the nominal value obtained at v in = v out_nom + 8.5 v. 10. not guaranteed in dropout.
ncv47711 http://onsemi.com 5 typical characteristics figure 3. reference voltage vs. temperature figure 4. quiescent current vs. input voltage figure 5. output voltage vs. input voltage figure 6. input current vs. input voltage (reverse input voltage) figure 7. dropout vs. output current figure 8. output current limit vs. input voltage t j , junction temperature ( c) v in = 13.5 v i out = 5 ma v ref1 , reference voltage (v) 1.24 1.25 1.26 1.27 1.28 1.29 1.30 1.31 1.32 ? 40 ? 20 0 20 40 60 80 100 160 120 140 0 0.05 0.10 0.15 0.20 0.25 v in , input voltage (v) i q , quiescent current (ma) t j = 25 c i out = 5 ma v out_nom = 5 v 0 1 2 3 4 5 6 0246810 v in , input voltage (v) v out , output voltage (v) t j = 25 c i out = 5 ma v out_nom = 5 v v in , input voltage (v) i in , input current (ma) t j = 25 c r out = 4.7 k v out_nom = 5 v i out , output current (ma) v do , dropout voltage (mv) v in = 13.5 v v out_nom = 5 v v in , input voltage (v) i lim , output current limit (ma) 0.30 0.35 0.40 0 5 10 15 20 25 40 30 35 13579 ? 8 ? 7 ? 6 ? 5 ? 4 ? 3 ? 2 ? 1 0 2 ? 45 ? 40 ? 35 ? 30 ? 25 ? 20 ? 5 ? 15 ? 10 10 05 1 t j = 150 c 0 100 200 300 400 500 600 700 800 0 50 100 150 200 250 300 350 t j = 25 c t j = ? 40 c v out = 4.5 v v out_nom = 5 v t j = 150 c 600 700 800 900 1000 1100 1200 1300 1400 0 5 10 15 20 25 30 35 t j = 25 c t j = ? 40 c 40 45
ncv47711 http://onsemi.com 6 typical characteristics figure 9. output current limit vs. r cso figure 10. output current (% of i lim ) vs. cso voltage figure 11. output current to cso current ratio vs. output current figure 12. output current to cso current ratio vs. output current in dropout 0 50 100 150 200 250 300 400 0481216202428 r cso , (k ) i lim , output current limit (ma) v out = 5 v to 20 v t j = 25 c 0 0.5 1.0 1.5 2.0 2.5 3.0 0 25 50 75 100 125 i out , output current (% of i lim ) v cso , (v) 350 2 6 10 14 18 22 26 v out = 5 v to 20 v t j = 25 c i lim = 10 ma to 350 ma 95 97 99 101 103 105 1 10 100 i out , output current (ma) i out /i cso , output current to cso current ratio t j = 25 c v in = 13.5 v 1000 figure 13. quiescent current vs. output current (high load) figure 14. quiescent current vs. output current (low load) 0 5 10 15 20 25 0 50 100 150 200 250 i out , output current (ma) i q , quiescent current (ma) t j = 25 c v in = 13.5 v 300 350 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 10 20 30 40 50 60 70 100 80 90 i out , output current (ma) i q , quiescent current (ma) t j = 25 c v in = 13.5 v 96 98 100 102 104 50 65 75 85 95 105 1 10 100 i out , output current (ma) i out /i cso , output current to cso current ratio t j = 25 c v in = 4.5 v v out_nom = 5 v 1000 60 70 80 90 100 55
ncv47711 http://onsemi.com 7 typical characteristics figure 15. output noise density vs. frequency figure 16. psrr vs. frequency figure 17. c out esr stability region vs. output current 0 500 1000 1500 2000 2500 3000 10 1000 100000 frequency (hz) output noise density (nv/ hz) noise 10 hz ? 100 khz v n = 100.6 v 100 10000 30 35 40 45 50 55 60 65 70 75 80 10 100 1000 10000 1000000 100000 frequency (hz) psrr (db) i out = 150 ma 0.01 1 10 100 0 50 100 150 200 250 300 350 i out , output current (ma) c out , esr stability region ( ) t j = 25 c v in = v out_nom + 8.5 v c out = 10 ? 100 f, c b = none unstable region unstable region t j = 25 c v in = 13.5 v v out_nom = 5 v i out = 5 ma 85 90 t j = 25 c v in = 13.5 v v out_nom = 5 v i out = 5 ma 0.1 v out = 20 v v out = 5 v
ncv47711 http://onsemi.com 8 definitions general all measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. output voltage the output voltage parameter is defined for specific temperature, input voltage and output current values or specified over line, load and temperature ranges. line regulation the change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. load regulation the change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. dropout voltage the input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. it is measured when the output voltage v out has dropped ? 2% from the nominal value obtained at v in = v out_nom + 8.5 v. the junction temperature, load current, and minimum input supply requirements affect the dropout level. quiescent and disable currents quiescent current (i q ) is the difference between the input current (measured through the ldo input pin) and the output load current. if enable pin is set to low the regulator reduces its internal bias and shuts off the output, this term is called the disable current (i dis ). current limit current limit is value of output current by which output voltage drops below 90% of its nominal value. psrr power supply rejection ratio is defined as ratio of output voltage and input voltage ripple. it is measured in decibels (db). line transient response typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. load transient response typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low ? load and high ? load conditions. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 175 c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower.
ncv47711 http://onsemi.com 9 applications information circuit description the ncv47711 is an integrated low dropout regulator that provides a regulated voltage at 350 ma to the output. it is enabled with an input to the enable pin. the regulator voltage is provided by a pnp pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible dropout voltage. the output current capability is 350 ma, and the base drive quiescent current is controlled to prevent oversaturation when the input voltage is low or when the output is overloaded. the integrated current sense feature provides diagnosis and system protection functionality. the current limit of the device is adjustable by resistor connected to cso pin. voltage on cso pin is proportional to output current. the regulator is protected by both current limit and thermal shutdown. thermal shutdown occurs above 150 c to protect the ic during overloads and extreme ambient temperatures. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor via a buffer. the reference is a bandgap design to give it a temperature ? stable output. saturation control of the pnp is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitor (c in ) is necessary to stabilize the input impedance to avoid voltage line influences. the output capacitor (c out ) helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures ( ? 25 c to ? 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturer?s data sheet usually provides this information. the value for the output capacitor c out , shown in figure 1 should work for most applications; see also figure 17 for output stability at various load and output capacitor esr conditions. stable region of esr in figure 17 shows esr values at which the ldo output voltage does not have any permanent oscillations at any dynamic changes of output load current. marginal esr is the value at which the output voltage waving is fully damped during four periods after the load change and no oscillation is further observable. esr characteristics were measured with ceramic capacitors and additional series resistors to emulate esr. low duty cycle pulse load current technique has been used to maintain junction temperature close to ambient temperature. calculating bypass capacitor if usage of low esr ceramic capacitors is demanded, connect the bypass capacitor c b between adjustable input pin and v out pin according to applications circuit at figure 1. parallel combination of bypass capacitor c b with the feedback resistor r 1 contributes in the device transfer function as an additional zero and affects the device loop stability, therefore its value must be optimized. attention to the output capacitor value and its esr must be paid. see also stability in high speed linear ldo regulators application note, and8037/d for more information. optimal value of bypass capacitor is given by following expression: c b 1 2 f z r 1 (eq. 1) where r 1 ? the upper feedback resistor f z ? the frequency of the zero added into the device transfer function by r 1 and c b external components. set the r 1 resistor according to output voltage requirement. chose the f z with regard on the output capacitance c out , refer to the table below. c out ( f) 10 22 47 100 f z range (khz) 3.3 ? 48.2 1.5 ? 33 1.5 ? 33 2.2 ? 22 ceramic capacitors and its part numbers listed bellow have been used as low esr output capacitors c out from the table above to define the frequency ranges of additional zero required for stability: grm31cr71c106kac7 (10 f, 16 v, x7r, 1206) grm32er71c226ke18 (22 f, 16 v, x7r, 1210) grm32er61c476me15 (47 f, 16 v, x5r, 1210) grm32er60j107me20 (100 f, 6.3 v, x5r, 1210) enable input the enable pin is used to turn the regulator on or off. by holding the pin down to a voltage less than 0.99 v, the output of the regulator will be turned off. when the voltage on the enable pin is greater than 2.31 v, the output of the regulator will be enabled to power its output to the regulated output voltage. the enable pin may be connected directly to the input pin to give constant enable to the output regulator. setting the output voltage the output voltage range can be set between 5 v and 20 v. this is accomplished with an external resistor divider feeding back the voltage to the ic back to the error amplifier by the voltage adjust pin adj. the internal reference voltage is set to a temperature stable reference (v ref1 ) of 1.275 v.
ncv47711 http://onsemi.com 10 the output voltage is calculated from the following formula. ignoring the bias current into the adj pin: v out v ref1 1 r 1 r 2 (eq. 2) use r 2 < 50 k to avoid significant voltage output errors due to adj bias current. designers should consider the tolerance of r 1 and r 2 during the design phase. setting the output current limit the output current limit can be set between 10 ma and 350 ma by external resistor r cso (see figure 1). capacitor c cso of 1 f in parallel with r cso is required for stability of current limit control circuitry (see figure 1). v cso i out r cso 1 100 (eq. 3) i lim 100 1 2.55 r cso (eq. 4) r cso 100 1 2.55 i lim (eq. 5) where r cso ? current limit setting resistor v cso ? voltage at cso pin proportional to i out i lim ? current limit value i out ? output current actual value cso pin provides information about output current actual value. the cso voltage is proportional to output current according to equation 3. once output current reaches its limit value (i lim ) set by external resistor r cso than voltage at cso pin is typically 2.55 v. calculations of i lim or r cso values can be done using equations equation 4 and equation 5, respectively. thermal considerations as power in the ncv47711 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. when the ncv47711 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power applications. the maximum dissipation the ncv47711 can handle is given by: p d(max) t j(max)
t a r ja (eq. 6) since t j is not recommended to exceed 150 c, then the ncv47711 soldered on 645 mm 2 , 1 oz copper area, fr4 can dissipate up to 1.8 w and up to 4.3 w for 4 layers pcb (all layers are 1 oz) when the ambient temperature (t a ) is 25 c. see figure 18 for r thja versus pcb area. the power dissipated by the ncv47711 can be calculated from the following equations: p d v in i q @i out i out v in
v out (eq. 7) or v in(max) p d(max) v out i out i out i q (eq. 8) hints v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. place external components, especially the output capacitor, as close as possible to the ncv47711 and make traces as short as possible. figure 18. thermal resistance vs. pcb copper area 40 60 80 100 120 140 160 180 0 100 200 300 400 500 600 700 copper heat spreader area (mm 2 ) r ja , thermal resistance ( c/w) 4 layers pcb ? all layers 1 oz cu single layer pcb 1 oz cu 0 20 200 220 single layer pcb 2 oz cu ordering information device output voltage marking package shipping ? NCV47711PDAJR2G adjustable 47711 soic ? 8 ep (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications,including part orientation and tape sizes, please refer to our tape and reel p ackaging specifications brochure, brd8011/d.
ncv47711 http://onsemi.com 11 package dimensions ? 8 ep case 751ac ? 01 issue b ?? ?? h c 0.10 d e1 a d pin one 2 x 8 x seating plane exposed gauge plane 14 5 8 d c 0.10 a-b 2 x e b e c 0.10 2 x top view side view bottom view detail a end view section a ? a 8 x b a-b 0.25 d c c c 0.10 c 0.20 a a2 g f 1 4 58 notes: 1. dimensions and tolerancing per asme y14.5m, 1994. 2. dimensions in millimeters (angles in degrees). 3. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 mm total in excess of the ?b? dimension at maximum material condition. 4. datums a and b to be determined at datum plane h. dim min max millimeters a 1.35 1.75 a1 0.00 0.10 a2 1.35 1.65 b 0.31 0.51 b1 0.28 0.48 c 0.17 0.25 c1 0.17 0.23 d 4.90 bsc e 6.00 bsc e 1.27 bsc l 0.40 1.27 l1 1.04 ref f 2.24 3.20 g 1.55 2.51 h 0.25 0.50 0 8 h aa detail a (b) b1 c c1 0.25 l (l1) pad e1 3.90 bsc a1 soldering footprint location exposed pad 1.52 0.060 2.03 0.08 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 7.0 0.275 2.72 0.107 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ncv47711/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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